The purpose of the EDI practicals is to help you to:
  • Learn the Handel-C hardware development language.
  • Become familiar with the FPGA development environment and the EDI FPGA boards.
  • Start thinking about the way that hardware is implemented on FPGAs, and which constructs are cheap and which are expensive in terms of logic usage.
  • Learn how to engineer the architecture of a solution to exploit the parallelism available.

You should aim to complete each practical before the start of the next one, as many of the concepts used will be examined in the assessment. If any aspects of the practicals are unclear, please ask Neil or a demonstrator to explain.

These practicals should all be performed with the lab machines in 32-bit Windows (selectable from the boot menu of the lab machines). It is also possible to work remotely, see the resources below.

List of Practicals

These practicals should be attempted in order as they build on knowledge from the previous practicals. Each lab is 3 hours long.